ENES 244 Digital Logic Design

This course will introduce the basic principles and design procedures of digital systems at the gate and intermediate chip levels for electrical engineering students. The student will acquire knowledge of gates, flip-flops, registers, counters, Karnaugh maps, FSM, ASM, ASN design techniques, HDL circuit descriptions, simulation and testing software.

Credits

3

Prerequisite

ENES 100 and MATH 153

Hours Weekly

2 hours lecture, 2 hours recitation weekly

Course Objectives

1. Perform two-level logic minimization using Boolean algebra, Karnaugh maps, and the Quine-McCluskey tabular minimization method.
2. Incorporate medium scale integrated circuits, like decoders, encoders, multiplexers, etc., into circuit design.
3. Use various types of latches and flip-flops to build finite state machines.
4. Describe various types of memory parity and error correction algorithms.
5. Build algorithmic state machines.
6. Design and simulate asynchronous sequential logic circuits.

Course Objectives

1. Perform two-level logic minimization using Boolean algebra, Karnaugh maps, and the Quine-McCluskey tabular minimization method.

   Learning Activity Artifact

   • Other (please fill out box below)
   • Homework

   Procedure for Assessing Student Learning

   • Other (please fill out box below)
   • Homework rubric
2. Incorporate medium scale integrated circuits, like decoders, encoders, multiplexers, etc., into circuit design.

   This objective is a course Goal Only

   Learning Activity Artifact

   • Other (please fill out box below)
   • Exam III

   Procedure for Assessing Student Learning

   • Other (please fill out box below)
   • Answer Key
3. Use various types of latches and flip-flops to build finite state machines.

   This objective is a course Goal Only

   Learning Activity Artifact

   • Other (please fill out box below)
   • Final exam

   Procedure for Assessing Student Learning

   • Other (please fill out box below)
   • Answer key
4. Describe various types of memory parity and error correction algorithms.

   This objective is a course Goal Only

   Learning Activity Artifact

   • Other (please fill out box below)
   • Homework

   Procedure for Assessing Student Learning

   • Other (please fill out box below)
   • Homework rubric
5. Build algorithmic state machines.

   This objective is a course Goal Only

   Learning Activity Artifact

   • Other (please fill out box below)
   • Homework

   Procedure for Assessing Student Learning

   • Other (please fill out box below)
   • Homework rubric
6. Design and simulate asynchronous sequential logic circuits.

   Program Goal(s)

   Degree: Engineering - A.A. Degree (Transfer)

   4. Utilize modern engineering techniques, skills, and tools, with an emphasis on the role that computers play in solving engineering problems.